THE IMPACT OF WAFER-LEVEL TECHNOLOGIES ON ADVANCED IC DESIGN
Instructor: Richard Dasher (rdasher at stanford dot edu)
* Available to Stanford students for one-unit credit as EE 402S, Topics in International Technology Management. (Register under EE 402A in Axess.)*
Broadcast live
via SITN (Stanford Instructional Television Network)
Stanford
Online: Presentations available online to registered students.
|
DATE |
SPEAKER |
ORGANIZATION |
TOPIC |
PRESENTATION MATERIALS |
| 4/05 |
Tom DiStefano, President and CEO, Decision Track |
Decision
Track
|
Issues
Driving Wafer Level Technologies
|
Slides (.ppt) |
| 4/12 |
Sergey
Savastiouk, Founder and CEO, Tru-Si Technologies
|
Tru-Sci
Technologies
|
Moore's
Law - the Z Dimension
|
Slides (.ppt) |
| 4/19 |
David Harame, Senior Manager, SiGe Simulation, Modeling, and Design Kits Dept, IBM |
IBM |
SiGe BiCMOS Technology: New Possibilities of Integration
|
Slides (.pdf) |
| 4/26 |
Joseph Fjelstad, Senior Consultant, Pacific Consultants LLC |
Pacific Consultants LLC |
Creating a Global Roadmap for Electronics Manufacturing |
Slides (.pdf) |
| 5/03 |
David Sherman, Vice-President, Engineering Alpine Microsystems |
Engineering Alpine Microsystems |
Silicon-based
System in Package
|
Slides (.pdf) |
| 5/10 |
|
R&D Ball Semiconductor Inc. |
MEMS Applications of Ball Semiconductor Technology
|
Slides (.pdf) |
| 5/17 |
Markus
Lutz, Robert Bosch Inc.
|
Robert Bosch Inc. |
MEMS
Packaging
|
Slides (.pdf) |
| 5/24 |
Tadatomo Suga, Professor, Research Center for Advanced Science & Technology (RCAST), University of Tokyo |
University of Tokyo |
Room temperature bonding: SAB and its applications in microelectronics |
Slides (.pdf) |
| 5/31 |
Stanford
Faculty Panel
|
Stanford University
|
Stanford's
research in wafer technologies
|
|
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Page last modified: Thursday, March 21, 2002 10:45 AM PDT Stanford University US-Asia Technology Management Center Copyright 1995-2002 |